From 1edb32d99a13c42e82abf01714a8799f9b2409ed Mon Sep 17 00:00:00 2001 From: Stefan Kalscheuer <stefan@stklcode.de> Date: Sun, 9 Sep 2018 11:43:33 +0200 Subject: [PATCH] Translated schematic and board comments and added frame --- hardware/midifs.brd | 56 +++++++++- hardware/midifs.sch | 258 +++++++++++++++++++++++++++----------------- 2 files changed, 211 insertions(+), 103 deletions(-) diff --git a/hardware/midifs.brd b/hardware/midifs.brd index d2079c8..b95b00b 100644 --- a/hardware/midifs.brd +++ b/hardware/midifs.brd @@ -1,9 +1,10 @@ <?xml version="1.0" encoding="utf-8"?> <!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="6.1"> +<eagle version="9.0.0"> <drawing> <settings> <setting alwaysvectorfont="no"/> +<setting keepoldvectorfont="yes"/> <setting verticaltext="up"/> </settings> <grid distance="50" unitdist="mil" unit="mil" style="lines" multiple="1" display="no" altdistance="0.025" altunitdist="inch" altunit="inch"/> @@ -74,6 +75,11 @@ <wire x1="55.86" y1="0" x2="55.86" y2="30" width="0" layer="20"/> <wire x1="55.86" y1="30" x2="0" y2="30" width="0" layer="20"/> <wire x1="0" y1="30" x2="0" y2="0" width="0" layer="20"/> +<text x="77.47" y="-38.1" size="2.54" layer="48" font="vector">MIDI Footswitch</text> +<text x="77.47" y="-43.18" size="2.54" layer="48" font="vector">Stefan Kalscheuer</text> +<text x="77.47" y="-48.26" size="2.54" layer="48" font="vector">17.06.2014</text> +<text x="77.47" y="-53.34" size="2.54" layer="48" font="vector">Sheet: 1/1</text> +<text x="107.95" y="-53.34" size="1.778" layer="48" font="vector">GPLv3</text> </plain> <libraries> <library name="resistor"> @@ -1450,6 +1456,29 @@ Based on the following sources: </package> </packages> </library> +<library name="frames" urn="urn:adsk.eagle:library:229"> +<description><b>Frames for Sheet and Layout</b></description> +<packages> +<package name="A5L-LOC" urn="urn:adsk.eagle:footprint:13904/1" library_version="1"> +<description><b>FRAME</b> DIN A5 landscape with doc field</description> +<wire x1="85.09" y1="3.81" x2="85.09" y2="24.13" width="0.1016" layer="48"/> +<wire x1="85.09" y1="24.13" x2="139.065" y2="24.13" width="0.1016" layer="48"/> +<wire x1="139.065" y1="24.13" x2="180.34" y2="24.13" width="0.1016" layer="48"/> +<wire x1="170.18" y1="3.81" x2="170.18" y2="8.89" width="0.1016" layer="48"/> +<wire x1="170.18" y1="8.89" x2="180.34" y2="8.89" width="0.1016" layer="48"/> +<wire x1="170.18" y1="8.89" x2="139.065" y2="8.89" width="0.1016" layer="48"/> +<wire x1="139.065" y1="8.89" x2="139.065" y2="3.81" width="0.1016" layer="48"/> +<wire x1="139.065" y1="8.89" x2="139.065" y2="13.97" width="0.1016" layer="48"/> +<wire x1="139.065" y1="13.97" x2="180.34" y2="13.97" width="0.1016" layer="48"/> +<wire x1="139.065" y1="13.97" x2="139.065" y2="19.05" width="0.1016" layer="48"/> +<wire x1="139.065" y1="19.05" x2="180.34" y2="19.05" width="0.1016" layer="48"/> +<wire x1="139.065" y1="19.05" x2="139.065" y2="24.13" width="0.1016" layer="48"/> +<text x="140.97" y="15.24" size="2.54" layer="48" font="vector">>DRAWING_NAME</text> +<text x="140.97" y="10.16" size="2.286" layer="48" font="vector">>LAST_DATE_TIME</text> +<frame x1="0" y1="0" x2="184.15" y2="133.35" columns="4" rows="4" layer="48"/> +</package> +</packages> +</library> </libraries> <attributes> </attributes> @@ -1459,7 +1488,7 @@ Based on the following sources: <class number="0" name="default" width="0" drill="0"> </class> </classes> -<designrules> +<designrules name="default"> <description language="de"><b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für @@ -1535,16 +1564,20 @@ design rules under a new name.</description> <param name="slThermalsForVias" value="0"/> <param name="dpMaxLengthDifference" value="10mm"/> <param name="dpGapFactor" value="2.5"/> -<param name="checkGrid" value="0"/> <param name="checkAngle" value="0"/> <param name="checkFont" value="1"/> <param name="checkRestrict" value="1"/> +<param name="checkStop" value="0"/> +<param name="checkValues" value="0"/> <param name="useDiameter" value="13"/> <param name="maxErrors" value="50"/> </designrules> <autorouter> <pass name="Default"> <param name="RoutingGrid" value="50mil"/> +<param name="AutoGrid" value="1"/> +<param name="Efforts" value="0"/> +<param name="TopRouterVariant" value="1"/> <param name="tpViaShape" value="round"/> <param name="PrefDir.1" value="|"/> <param name="PrefDir.2" value="0"/> @@ -1641,8 +1674,8 @@ design rules under a new name.</description> <element name="R3" library="resistor" package="0207/7" value="220" x="35.56" y="3.81"/> <element name="IC1" library="atmel" package="DIL20" value="TINY2313-PU" x="22.86" y="15.24"/> <element name="C3" library="resistor" package="C025-024X044" value="100n" x="12.7" y="21.59"/> -<element name="X2" library="pinhead" package="1X05" value="TASTER" x="26.67" y="24.13"/> -<element name="X3" library="pinhead" package="1X03" value="SCHALTER" x="39.37" y="24.13"/> +<element name="X2" library="pinhead" package="1X05" value="BUTTONS" x="26.67" y="24.13"/> +<element name="X3" library="pinhead" package="1X03" value="SWITCH" x="39.37" y="24.13"/> <element name="R4" library="resistor" package="0207/7" value="390" x="35.56" y="8.89"/> <element name="R5" library="resistor" package="0207/7" value="330" x="35.56" y="6.35"/> <element name="X4" library="pinhead" package="1X03" value="LED" x="46.99" y="19.05" rot="R270"/> @@ -1654,6 +1687,7 @@ design rules under a new name.</description> <element name="D1" library="diode" package="D-5" value="" x="1.27" y="21.59" rot="R90"/> <element name="R6" library="resistor" package="0207/7" value="10k" x="24.13" y="5.08" rot="R90"/> <element name="R7" library="resistor" package="0207/7" value="10k" x="26.67" y="5.08" rot="R90"/> +<element name="U$2" library="frames" library_urn="urn:adsk.eagle:library:229" package="A5L-LOC" value="" x="-63.5" y="-58.42" smashed="yes"/> </elements> <signals> <signal name="GND"> @@ -1805,4 +1839,16 @@ design rules under a new name.</description> </signals> </board> </drawing> +<compatibility> +<note version="8.2" severity="warning"> +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. +</note> +<note version="8.3" severity="warning"> +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. +</note> +</compatibility> </eagle> diff --git a/hardware/midifs.sch b/hardware/midifs.sch index 5ec66a6..c78763c 100644 --- a/hardware/midifs.sch +++ b/hardware/midifs.sch @@ -1,9 +1,10 @@ <?xml version="1.0" encoding="utf-8"?> <!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="6.1"> +<eagle version="9.0.0"> <drawing> <settings> <setting alwaysvectorfont="no"/> +<setting keepoldvectorfont="yes"/> <setting verticaltext="up"/> </settings> <grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> @@ -13763,6 +13764,47 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> </deviceset> </devicesets> </library> +<library name="frames" urn="urn:adsk.eagle:library:229"> +<description><b>Frames for Sheet and Layout</b></description> +<packages> +</packages> +<symbols> +<symbol name="A5L-LOC" urn="urn:adsk.eagle:symbol:13879/1" library_version="1"> +<wire x1="85.09" y1="3.81" x2="85.09" y2="24.13" width="0.1016" layer="94"/> +<wire x1="85.09" y1="24.13" x2="139.065" y2="24.13" width="0.1016" layer="94"/> +<wire x1="139.065" y1="24.13" x2="180.34" y2="24.13" width="0.1016" layer="94"/> +<wire x1="170.18" y1="3.81" x2="170.18" y2="8.89" width="0.1016" layer="94"/> +<wire x1="170.18" y1="8.89" x2="180.34" y2="8.89" width="0.1016" layer="94"/> +<wire x1="170.18" y1="8.89" x2="139.065" y2="8.89" width="0.1016" layer="94"/> +<wire x1="139.065" y1="8.89" x2="139.065" y2="3.81" width="0.1016" layer="94"/> +<wire x1="139.065" y1="8.89" x2="139.065" y2="13.97" width="0.1016" layer="94"/> +<wire x1="139.065" y1="13.97" x2="180.34" y2="13.97" width="0.1016" layer="94"/> +<wire x1="139.065" y1="13.97" x2="139.065" y2="19.05" width="0.1016" layer="94"/> +<wire x1="139.065" y1="19.05" x2="180.34" y2="19.05" width="0.1016" layer="94"/> +<wire x1="139.065" y1="19.05" x2="139.065" y2="24.13" width="0.1016" layer="94"/> +<text x="140.97" y="15.24" size="2.54" layer="94">>DRAWING_NAME</text> +<text x="140.97" y="10.16" size="2.286" layer="94">>LAST_DATE_TIME</text> +<text x="154.305" y="5.08" size="2.54" layer="94">>SHEET</text> +<text x="140.716" y="4.953" size="2.54" layer="94">Sheet:</text> +<frame x1="0" y1="0" x2="184.15" y2="133.35" columns="4" rows="4" layer="94"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="A5L-LOC" urn="urn:adsk.eagle:component:13933/1" prefix="FRAME" uservalue="yes" library_version="1"> +<description>A5L LOC</description> +<gates> +<gate name="G$1" symbol="A5L-LOC" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> </libraries> <attributes> </attributes> @@ -13782,9 +13824,9 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> <part name="P+2" library="supply1" deviceset="+5V" device=""/> <part name="GND2" library="supply1" deviceset="GND" device=""/> <part name="C3" library="resistor" deviceset="C-EU" device="025-024X044" value="100n"/> -<part name="X2" library="pinhead" deviceset="PINHD-1X5" device="" value="TASTER"/> +<part name="X2" library="pinhead" deviceset="PINHD-1X5" device="" value="BUTTONS"/> <part name="GND3" library="supply1" deviceset="GND" device=""/> -<part name="X3" library="pinhead" deviceset="PINHD-1X3" device="" value="SCHALTER"/> +<part name="X3" library="pinhead" deviceset="PINHD-1X3" device="" value="SWITCH"/> <part name="GND4" library="supply1" deviceset="GND" device=""/> <part name="R4" library="resistor" deviceset="R-EU_" device="0207/7" value="390"/> <part name="R5" library="resistor" deviceset="R-EU_" device="0207/7" value="330"/> @@ -13805,149 +13847,157 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> <part name="R7" library="resistor" deviceset="R-EU_" device="0207/7" value="10k"/> <part name="P+5" library="supply1" deviceset="+5V" device=""/> <part name="P+6" library="supply1" deviceset="+5V" device=""/> +<part name="FRAME1" library="frames" library_urn="urn:adsk.eagle:library:229" deviceset="A5L-LOC" device="" value="asd"/> </parts> <sheets> <sheet> <plain> +<text x="140.97" y="20.32" size="2.54" layer="94" ratio="10">MIDI Footswitch</text> +<text x="140.97" y="15.24" size="2.54" layer="94" ratio="10">Stefan Kalscheuer</text> +<text x="171.45" y="5.08" size="1.778" layer="94" ratio="10">GPLv3</text> +<text x="140.97" y="10.16" size="2.54" layer="94" ratio="10">17.06.2014</text> </plain> <instances> -<instance part="R1" gate="G$1" x="5.08" y="43.18" rot="R90"/> -<instance part="R2" gate="G$1" x="127" y="38.1" rot="R90"/> -<instance part="R3" gate="G$1" x="119.38" y="27.94"/> -<instance part="GND1" gate="1" x="127" y="20.32"/> -<instance part="P+1" gate="1" x="127" y="48.26"/> -<instance part="IC1" gate="G$1" x="27.94" y="43.18"/> -<instance part="P+2" gate="1" x="-2.54" y="43.18"/> -<instance part="GND2" gate="1" x="-2.54" y="20.32"/> -<instance part="C3" gate="G$1" x="-2.54" y="33.02"/> -<instance part="X2" gate="A" x="63.5" y="78.74" rot="R90"/> -<instance part="GND3" gate="1" x="58.42" y="66.04"/> -<instance part="X3" gate="A" x="106.68" y="78.74" rot="MR90"/> -<instance part="GND4" gate="1" x="106.68" y="66.04"/> -<instance part="R4" gate="G$1" x="83.82" y="53.34" rot="R90"/> -<instance part="R5" gate="G$1" x="88.9" y="53.34" rot="R90"/> -<instance part="X4" gate="A" x="86.36" y="78.74" rot="R90"/> -<instance part="X5" gate="A" x="142.24" y="27.94" rot="MR180"/> -<instance part="X1" gate="G$1" x="7.62" y="119.38" rot="MR0"/> -<instance part="IC2" gate="A1" x="48.26" y="121.92"/> -<instance part="C1" gate="G$1" x="30.48" y="116.84"/> -<instance part="C2" gate="G$1" x="63.5" y="116.84"/> -<instance part="P+3" gate="1" x="63.5" y="129.54"/> -<instance part="GND6" gate="1" x="22.86" y="106.68"/> -<instance part="GND7" gate="1" x="30.48" y="106.68"/> -<instance part="GND8" gate="1" x="48.26" y="106.68"/> -<instance part="GND9" gate="1" x="63.5" y="106.68"/> -<instance part="D1" gate="G$1" x="22.86" y="121.92"/> -<instance part="P+4" gate="1" x="86.36" y="66.04" rot="R180"/> -<instance part="R6" gate="G$1" x="121.92" y="68.58" rot="R270"/> -<instance part="R7" gate="G$1" x="129.54" y="68.58" rot="R270"/> -<instance part="P+5" gate="1" x="121.92" y="81.28"/> -<instance part="P+6" gate="1" x="129.54" y="81.28"/> +<instance part="R1" gate="G$1" x="25.4" y="81.28" rot="R90"/> +<instance part="R2" gate="G$1" x="147.32" y="76.2" rot="R90"/> +<instance part="R3" gate="G$1" x="139.7" y="66.04"/> +<instance part="GND1" gate="1" x="147.32" y="58.42"/> +<instance part="P+1" gate="1" x="147.32" y="86.36"/> +<instance part="IC1" gate="G$1" x="48.26" y="81.28"/> +<instance part="P+2" gate="1" x="17.78" y="81.28"/> +<instance part="GND2" gate="1" x="17.78" y="58.42"/> +<instance part="C3" gate="G$1" x="17.78" y="71.12"/> +<instance part="X2" gate="A" x="83.82" y="116.84" rot="R90"/> +<instance part="GND3" gate="1" x="78.74" y="104.14"/> +<instance part="X3" gate="A" x="127" y="116.84" rot="MR90"/> +<instance part="GND4" gate="1" x="127" y="104.14"/> +<instance part="R4" gate="G$1" x="104.14" y="91.44" rot="R90"/> +<instance part="R5" gate="G$1" x="109.22" y="91.44" rot="R90"/> +<instance part="X4" gate="A" x="106.68" y="116.84" rot="R90"/> +<instance part="X5" gate="A" x="162.56" y="66.04" rot="MR180"/> +<instance part="X1" gate="G$1" x="12.7" y="27.94" rot="MR0"/> +<instance part="IC2" gate="A1" x="53.34" y="30.48"/> +<instance part="C1" gate="G$1" x="35.56" y="25.4"/> +<instance part="C2" gate="G$1" x="68.58" y="25.4"/> +<instance part="P+3" gate="1" x="68.58" y="38.1"/> +<instance part="GND6" gate="1" x="27.94" y="15.24"/> +<instance part="GND7" gate="1" x="35.56" y="15.24"/> +<instance part="GND8" gate="1" x="53.34" y="15.24"/> +<instance part="GND9" gate="1" x="68.58" y="15.24"/> +<instance part="D1" gate="G$1" x="27.94" y="30.48"/> +<instance part="P+4" gate="1" x="106.68" y="104.14" rot="R180"/> +<instance part="R6" gate="G$1" x="142.24" y="106.68" rot="R270"/> +<instance part="R7" gate="G$1" x="149.86" y="106.68" rot="R270"/> +<instance part="P+5" gate="1" x="142.24" y="119.38"/> +<instance part="P+6" gate="1" x="149.86" y="119.38"/> +<instance part="FRAME1" gate="G$1" x="0" y="0" smashed="yes"> +<attribute name="SHEET" x="154.305" y="5.08" size="2.54" layer="94"/> +</instance> </instances> <busses> </busses> <nets> <net name="GND" class="0"> <segment> -<wire x1="127" y1="25.4" x2="127" y2="22.86" width="0.1524" layer="91"/> +<wire x1="147.32" y1="63.5" x2="147.32" y2="60.96" width="0.1524" layer="91"/> <pinref part="GND1" gate="1" pin="GND"/> <pinref part="X5" gate="A" pin="1"/> -<wire x1="139.7" y1="25.4" x2="127" y2="25.4" width="0.1524" layer="91"/> +<wire x1="160.02" y1="63.5" x2="147.32" y2="63.5" width="0.1524" layer="91"/> </segment> <segment> <pinref part="IC1" gate="G$1" pin="GND"/> <pinref part="C3" gate="G$1" pin="2"/> -<wire x1="10.16" y1="27.94" x2="-2.54" y2="27.94" width="0.1524" layer="91"/> -<wire x1="-2.54" y1="27.94" x2="-2.54" y2="22.86" width="0.1524" layer="91"/> +<wire x1="30.48" y1="66.04" x2="17.78" y2="66.04" width="0.1524" layer="91"/> +<wire x1="17.78" y1="66.04" x2="17.78" y2="60.96" width="0.1524" layer="91"/> <pinref part="GND2" gate="1" pin="GND"/> -<junction x="-2.54" y="27.94"/> +<junction x="17.78" y="66.04"/> </segment> <segment> <pinref part="X3" gate="A" pin="2"/> -<wire x1="106.68" y1="76.2" x2="106.68" y2="68.58" width="0.1524" layer="91"/> +<wire x1="127" y1="114.3" x2="127" y2="106.68" width="0.1524" layer="91"/> <pinref part="GND4" gate="1" pin="GND"/> </segment> <segment> <pinref part="X1" gate="G$1" pin="2"/> -<wire x1="10.16" y1="119.38" x2="22.86" y2="119.38" width="0.1524" layer="91"/> -<wire x1="22.86" y1="119.38" x2="22.86" y2="109.22" width="0.1524" layer="91"/> +<wire x1="15.24" y1="27.94" x2="27.94" y2="27.94" width="0.1524" layer="91"/> +<wire x1="27.94" y1="27.94" x2="27.94" y2="17.78" width="0.1524" layer="91"/> <pinref part="GND6" gate="1" pin="GND"/> </segment> <segment> <pinref part="C1" gate="G$1" pin="-"/> -<wire x1="30.48" y1="111.76" x2="30.48" y2="109.22" width="0.1524" layer="91"/> +<wire x1="35.56" y1="20.32" x2="35.56" y2="17.78" width="0.1524" layer="91"/> <pinref part="GND7" gate="1" pin="GND"/> </segment> <segment> <pinref part="C2" gate="G$1" pin="2"/> -<wire x1="63.5" y1="111.76" x2="63.5" y2="109.22" width="0.1524" layer="91"/> +<wire x1="68.58" y1="20.32" x2="68.58" y2="17.78" width="0.1524" layer="91"/> <pinref part="GND9" gate="1" pin="GND"/> </segment> <segment> <pinref part="IC2" gate="A1" pin="GND"/> -<wire x1="48.26" y1="114.3" x2="48.26" y2="109.22" width="0.1524" layer="91"/> +<wire x1="53.34" y1="22.86" x2="53.34" y2="17.78" width="0.1524" layer="91"/> <pinref part="GND8" gate="1" pin="GND"/> </segment> <segment> <pinref part="X2" gate="A" pin="1"/> <pinref part="GND3" gate="1" pin="GND"/> -<wire x1="58.42" y1="76.2" x2="58.42" y2="68.58" width="0.1524" layer="91"/> +<wire x1="78.74" y1="114.3" x2="78.74" y2="106.68" width="0.1524" layer="91"/> </segment> </net> <net name="+5V" class="0"> <segment> <pinref part="R2" gate="G$1" pin="2"/> <pinref part="P+1" gate="1" pin="+5V"/> -<wire x1="127" y1="45.72" x2="127" y2="43.18" width="0.1524" layer="91"/> +<wire x1="147.32" y1="83.82" x2="147.32" y2="81.28" width="0.1524" layer="91"/> </segment> <segment> <pinref part="IC1" gate="G$1" pin="VCC"/> <pinref part="R1" gate="G$1" pin="1"/> -<wire x1="10.16" y1="35.56" x2="5.08" y2="35.56" width="0.1524" layer="91"/> -<wire x1="5.08" y1="35.56" x2="5.08" y2="38.1" width="0.1524" layer="91"/> +<wire x1="30.48" y1="73.66" x2="25.4" y2="73.66" width="0.1524" layer="91"/> +<wire x1="25.4" y1="73.66" x2="25.4" y2="76.2" width="0.1524" layer="91"/> <pinref part="C3" gate="G$1" pin="1"/> -<wire x1="5.08" y1="35.56" x2="-2.54" y2="35.56" width="0.1524" layer="91"/> +<wire x1="25.4" y1="73.66" x2="17.78" y2="73.66" width="0.1524" layer="91"/> <pinref part="P+2" gate="1" pin="+5V"/> -<wire x1="-2.54" y1="35.56" x2="-2.54" y2="40.64" width="0.1524" layer="91"/> -<junction x="-2.54" y="35.56"/> -<junction x="5.08" y="35.56"/> +<wire x1="17.78" y1="73.66" x2="17.78" y2="78.74" width="0.1524" layer="91"/> +<junction x="17.78" y="73.66"/> +<junction x="25.4" y="73.66"/> </segment> <segment> <pinref part="C2" gate="G$1" pin="1"/> -<wire x1="63.5" y1="119.38" x2="63.5" y2="121.92" width="0.1524" layer="91"/> +<wire x1="68.58" y1="27.94" x2="68.58" y2="30.48" width="0.1524" layer="91"/> <pinref part="IC2" gate="A1" pin="VO"/> -<wire x1="63.5" y1="121.92" x2="58.42" y2="121.92" width="0.1524" layer="91"/> -<wire x1="63.5" y1="121.92" x2="63.5" y2="127" width="0.1524" layer="91"/> +<wire x1="68.58" y1="30.48" x2="63.5" y2="30.48" width="0.1524" layer="91"/> +<wire x1="68.58" y1="30.48" x2="68.58" y2="35.56" width="0.1524" layer="91"/> <pinref part="P+3" gate="1" pin="+5V"/> -<junction x="63.5" y="121.92"/> +<junction x="68.58" y="30.48"/> </segment> <segment> -<wire x1="86.36" y1="68.58" x2="86.36" y2="76.2" width="0.1524" layer="91"/> +<wire x1="106.68" y1="106.68" x2="106.68" y2="114.3" width="0.1524" layer="91"/> <pinref part="X4" gate="A" pin="2"/> <pinref part="P+4" gate="1" pin="+5V"/> </segment> <segment> <pinref part="R6" gate="G$1" pin="1"/> -<wire x1="121.92" y1="73.66" x2="121.92" y2="78.74" width="0.1524" layer="91"/> +<wire x1="142.24" y1="111.76" x2="142.24" y2="116.84" width="0.1524" layer="91"/> <pinref part="P+5" gate="1" pin="+5V"/> </segment> <segment> <pinref part="R7" gate="G$1" pin="1"/> -<wire x1="129.54" y1="73.66" x2="129.54" y2="78.74" width="0.1524" layer="91"/> +<wire x1="149.86" y1="111.76" x2="149.86" y2="116.84" width="0.1524" layer="91"/> <pinref part="P+6" gate="1" pin="+5V"/> </segment> </net> <net name="N$2" class="0"> <segment> <pinref part="R2" gate="G$1" pin="1"/> -<wire x1="139.7" y1="30.48" x2="127" y2="30.48" width="0.1524" layer="91"/> -<wire x1="127" y1="30.48" x2="127" y2="33.02" width="0.1524" layer="91"/> +<wire x1="160.02" y1="68.58" x2="147.32" y2="68.58" width="0.1524" layer="91"/> +<wire x1="147.32" y1="68.58" x2="147.32" y2="71.12" width="0.1524" layer="91"/> <pinref part="X5" gate="A" pin="3"/> </segment> </net> <net name="N$3" class="0"> <segment> -<wire x1="139.7" y1="27.94" x2="124.46" y2="27.94" width="0.1524" layer="91"/> +<wire x1="160.02" y1="66.04" x2="144.78" y2="66.04" width="0.1524" layer="91"/> <pinref part="R3" gate="G$1" pin="2"/> <pinref part="X5" gate="A" pin="2"/> </segment> @@ -13955,102 +14005,102 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> <net name="N$1" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PD1/TXD"/> -<wire x1="43.18" y1="27.94" x2="114.3" y2="27.94" width="0.1524" layer="91"/> +<wire x1="63.5" y1="66.04" x2="134.62" y2="66.04" width="0.1524" layer="91"/> <pinref part="R3" gate="G$1" pin="1"/> </segment> </net> <net name="N$4" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PA2/!RESET"/> -<wire x1="10.16" y1="50.8" x2="5.08" y2="50.8" width="0.1524" layer="91"/> +<wire x1="30.48" y1="88.9" x2="25.4" y2="88.9" width="0.1524" layer="91"/> <pinref part="R1" gate="G$1" pin="2"/> -<wire x1="5.08" y1="50.8" x2="5.08" y2="48.26" width="0.1524" layer="91"/> +<wire x1="25.4" y1="88.9" x2="25.4" y2="86.36" width="0.1524" layer="91"/> </segment> </net> <net name="N$5" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PB0/AIN0"/> -<wire x1="43.18" y1="45.72" x2="68.58" y2="45.72" width="0.1524" layer="91"/> +<wire x1="63.5" y1="83.82" x2="88.9" y2="83.82" width="0.1524" layer="91"/> <pinref part="X2" gate="A" pin="5"/> -<wire x1="68.58" y1="45.72" x2="68.58" y2="76.2" width="0.1524" layer="91"/> +<wire x1="88.9" y1="83.82" x2="88.9" y2="114.3" width="0.1524" layer="91"/> </segment> </net> <net name="N$6" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PB1/AIN1"/> -<wire x1="66.04" y1="48.26" x2="43.18" y2="48.26" width="0.1524" layer="91"/> +<wire x1="86.36" y1="86.36" x2="63.5" y2="86.36" width="0.1524" layer="91"/> <pinref part="X2" gate="A" pin="4"/> -<wire x1="66.04" y1="76.2" x2="66.04" y2="48.26" width="0.1524" layer="91"/> +<wire x1="86.36" y1="114.3" x2="86.36" y2="86.36" width="0.1524" layer="91"/> </segment> </net> <net name="N$7" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PB2/OC0B"/> -<wire x1="43.18" y1="50.8" x2="63.5" y2="50.8" width="0.1524" layer="91"/> +<wire x1="63.5" y1="88.9" x2="83.82" y2="88.9" width="0.1524" layer="91"/> <pinref part="X2" gate="A" pin="3"/> -<wire x1="63.5" y1="50.8" x2="63.5" y2="76.2" width="0.1524" layer="91"/> +<wire x1="83.82" y1="88.9" x2="83.82" y2="114.3" width="0.1524" layer="91"/> </segment> </net> <net name="N$8" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PB3/OC1A"/> -<wire x1="43.18" y1="53.34" x2="60.96" y2="53.34" width="0.1524" layer="91"/> +<wire x1="63.5" y1="91.44" x2="81.28" y2="91.44" width="0.1524" layer="91"/> <pinref part="X2" gate="A" pin="2"/> -<wire x1="60.96" y1="76.2" x2="60.96" y2="53.34" width="0.1524" layer="91"/> +<wire x1="81.28" y1="114.3" x2="81.28" y2="91.44" width="0.1524" layer="91"/> </segment> </net> <net name="N$9" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PD2/INT0"/> -<wire x1="43.18" y1="30.48" x2="109.22" y2="30.48" width="0.1524" layer="91"/> +<wire x1="63.5" y1="68.58" x2="129.54" y2="68.58" width="0.1524" layer="91"/> <pinref part="X3" gate="A" pin="1"/> -<wire x1="109.22" y1="76.2" x2="109.22" y2="60.96" width="0.1524" layer="91"/> +<wire x1="129.54" y1="114.3" x2="129.54" y2="99.06" width="0.1524" layer="91"/> <pinref part="R6" gate="G$1" pin="2"/> -<wire x1="109.22" y1="60.96" x2="109.22" y2="30.48" width="0.1524" layer="91"/> -<wire x1="121.92" y1="63.5" x2="121.92" y2="60.96" width="0.1524" layer="91"/> -<wire x1="121.92" y1="60.96" x2="109.22" y2="60.96" width="0.1524" layer="91"/> -<junction x="109.22" y="60.96"/> +<wire x1="129.54" y1="99.06" x2="129.54" y2="68.58" width="0.1524" layer="91"/> +<wire x1="142.24" y1="101.6" x2="142.24" y2="99.06" width="0.1524" layer="91"/> +<wire x1="142.24" y1="99.06" x2="129.54" y2="99.06" width="0.1524" layer="91"/> +<junction x="129.54" y="99.06"/> </segment> </net> <net name="N$10" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PD3/INT1"/> -<wire x1="104.14" y1="33.02" x2="43.18" y2="33.02" width="0.1524" layer="91"/> +<wire x1="124.46" y1="71.12" x2="63.5" y2="71.12" width="0.1524" layer="91"/> <pinref part="X3" gate="A" pin="3"/> -<wire x1="104.14" y1="33.02" x2="104.14" y2="58.42" width="0.1524" layer="91"/> +<wire x1="124.46" y1="71.12" x2="124.46" y2="96.52" width="0.1524" layer="91"/> <pinref part="R7" gate="G$1" pin="2"/> -<wire x1="104.14" y1="58.42" x2="104.14" y2="76.2" width="0.1524" layer="91"/> -<wire x1="104.14" y1="58.42" x2="129.54" y2="58.42" width="0.1524" layer="91"/> -<wire x1="129.54" y1="58.42" x2="129.54" y2="63.5" width="0.1524" layer="91"/> -<junction x="104.14" y="58.42"/> +<wire x1="124.46" y1="96.52" x2="124.46" y2="114.3" width="0.1524" layer="91"/> +<wire x1="124.46" y1="96.52" x2="149.86" y2="96.52" width="0.1524" layer="91"/> +<wire x1="149.86" y1="96.52" x2="149.86" y2="101.6" width="0.1524" layer="91"/> +<junction x="124.46" y="96.52"/> </segment> </net> <net name="N$11" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PD4/T0"/> -<wire x1="88.9" y1="48.26" x2="88.9" y2="35.56" width="0.1524" layer="91"/> -<wire x1="88.9" y1="35.56" x2="43.18" y2="35.56" width="0.1524" layer="91"/> +<wire x1="109.22" y1="86.36" x2="109.22" y2="73.66" width="0.1524" layer="91"/> +<wire x1="109.22" y1="73.66" x2="63.5" y2="73.66" width="0.1524" layer="91"/> <pinref part="R5" gate="G$1" pin="1"/> </segment> </net> <net name="N$12" class="0"> <segment> <pinref part="IC1" gate="G$1" pin="PD5/OC0B"/> -<wire x1="43.18" y1="38.1" x2="83.82" y2="38.1" width="0.1524" layer="91"/> -<wire x1="83.82" y1="38.1" x2="83.82" y2="48.26" width="0.1524" layer="91"/> +<wire x1="63.5" y1="76.2" x2="104.14" y2="76.2" width="0.1524" layer="91"/> +<wire x1="104.14" y1="76.2" x2="104.14" y2="86.36" width="0.1524" layer="91"/> <pinref part="R4" gate="G$1" pin="1"/> </segment> </net> <net name="N$13" class="0"> <segment> -<wire x1="83.82" y1="58.42" x2="83.82" y2="76.2" width="0.1524" layer="91"/> +<wire x1="104.14" y1="96.52" x2="104.14" y2="114.3" width="0.1524" layer="91"/> <pinref part="R4" gate="G$1" pin="2"/> <pinref part="X4" gate="A" pin="1"/> </segment> </net> <net name="N$14" class="0"> <segment> -<wire x1="88.9" y1="76.2" x2="88.9" y2="58.42" width="0.1524" layer="91"/> +<wire x1="109.22" y1="114.3" x2="109.22" y2="96.52" width="0.1524" layer="91"/> <pinref part="R5" gate="G$1" pin="2"/> <pinref part="X4" gate="A" pin="3"/> </segment> @@ -14058,11 +14108,11 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> <net name="N$15" class="0"> <segment> <pinref part="IC2" gate="A1" pin="VI"/> -<wire x1="38.1" y1="121.92" x2="30.48" y2="121.92" width="0.1524" layer="91"/> +<wire x1="43.18" y1="30.48" x2="35.56" y2="30.48" width="0.1524" layer="91"/> <pinref part="C1" gate="G$1" pin="+"/> -<wire x1="30.48" y1="121.92" x2="25.4" y2="121.92" width="0.1524" layer="91"/> -<wire x1="30.48" y1="119.38" x2="30.48" y2="121.92" width="0.1524" layer="91"/> -<junction x="30.48" y="121.92"/> +<wire x1="35.56" y1="30.48" x2="30.48" y2="30.48" width="0.1524" layer="91"/> +<wire x1="35.56" y1="27.94" x2="35.56" y2="30.48" width="0.1524" layer="91"/> +<junction x="35.56" y="30.48"/> <pinref part="D1" gate="G$1" pin="C"/> </segment> </net> @@ -14070,7 +14120,7 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> <segment> <pinref part="X1" gate="G$1" pin="1"/> <pinref part="D1" gate="G$1" pin="A"/> -<wire x1="20.32" y1="121.92" x2="10.16" y2="121.92" width="0.1524" layer="91"/> +<wire x1="25.4" y1="30.48" x2="15.24" y2="30.48" width="0.1524" layer="91"/> </segment> </net> </nets> @@ -14078,4 +14128,16 @@ Source: http://www.diodes.com/datasheets/ds23001.pdf</description> </sheets> </schematic> </drawing> +<compatibility> +<note version="8.2" severity="warning"> +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. +</note> +<note version="8.3" severity="warning"> +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. +</note> +</compatibility> </eagle>